Implementing EEPROM emulation with wear-leveling for 8-bit MCUs

This application note demonstrates a way to use the flash memory of an 8-bit flash MCU to emulate single-variable-rewritable EEPROM memory through firmware. The example API provided enables reading and writing of single variables to non-volatile flash memory. The erase-rewrite algorithm implements wear-leveling on the flash by distributing page erases.

There are different ways to implement an EEPROM emulator using flash memory. The idea behind the implementation discussed in this document is to allocate a certain number of pages of flash memory for the entire lifetime of the application. The wear is then leveled among these by alternating the pages used. The number of pages allocated must reflect the amount of data that will be written throughout the application lifetime.

Pages and Their States

In every page allocated to the EEPROM emulator, the first 4 bytes are reserved for page head data. This head data contains the status of the page and the erase count, which is the number of times the page has been erased. Each page will always be in one of three different states: Active, Receiving, or Erased.

  • After a page is Erased, all bits in the entire page are 1’s except the head data of the page.
  • When a page is Receiving, a transfer of variables from a full active page is in progress. After the transfer is complete, a transfer of variables from a full active page is in progress. After the transfer is complete, the Receiving page becomes the new Active page, and the firmware erases the old active page.
  • The Active page is the page that contains the currently valid data. All read and write operations occur on the Active page. There should never be more than one Active or Receiving page at any time in this implementation.

Figure 1 shows the state flow for an implementation using two pages. The flow would be similar if more pages are allocated, with more pages simultaneously in the Erased state.

Figure1. EEPROM Emulation Page Status Flow

During initialization, the firmware checks the page status for the selected number of pages to ensure that a legal set of page-states are present. If there is more than one Active page, any pages that are full will be erased. Any Receiving status pages will also be erased. This minimizes the probability for data collisions with application program instructions, which are located at the base of the flash. In applications where much of the available flash memory is in use, it can be critical to know where all data is stored in the flash to avoid collisions.
The remaining words of each page after the page head data are free to be used for data storage. Each data storage word is divided into two parts: an 8-bit virtual address field and an 8-bit data field. The emulation firmware initiates a page transfer whenever a page is full. This transfer operation consists of several steps to always ensure that all variables are saved in case of an external interruption event.

  1. First, an Erased page is located to store the valid data present in the full page. The new page is marked as Receiving.
  2. Next, the most recent data associated with each variable is transferred to the top of the new page.
  3. The old Active page is erased, the erase count is written to the old active page header, and the Receiving page is labeled as the new Active page.

This process is illustrated in Figure 2.

Fiture2. EEPROM Emulation Variable Flow

If you want to download the full version of this application note, click here.

Learn more about an alternative method for EEPROM emulation – EEPROM Emulation for Flash Microcontrollers

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